From Plain English to Photonic Chip: How Fab-leTOME’s ALPINE Pipeline Makes PIC Design Accessible to Everyone

A human enters a room, LiDAR from the 50ft away on the other side of the room can do photodetection of the breath, and can bio screen that person. Can you as a software engineer think of how that would be solved? Let’s say photonic integrated circuits can do that? But, you want to learn how to do that and eventually actually do that in production. With www.fabletome.com, that is the plan.

Silicon once dethroned germanium and powered the greatest computing revolution in history, guided for decades by Moore’s Law. But as transistors shrink toward atomic scales, quantum tunneling, heat density, and escalating fabrication complexity are slowing the old roadmap. The next frontier is light. Photonics offers a path to higher bandwidth, lower latency, and dramatically better energy efficiency for communication, sensing, and future compute systems. At Fabletome, this shift can do more than transform chips—it can transform who gets to build them. Through a browser-based design platform with rapid iteration loops, software engineers everywhere can begin designing photonic components today, from small building blocks to increasingly sophisticated multi-component systems. While photonics is still earlier in its large-scale integration journey than traditional silicon electronics, the trajectory is clear. By combining AI-assisted workflows, simulation, and fast design-feedback cycles, Fabletome aims to turn millions of software developers into the next generation of hardware creators in the age of light.

Photonic chip design has spent decades locked inside specialist labs, guarded by expensive EDA tools, steep learning curves, and access to foundry PDKs that most people will never see. If you weren’t already a silicon photonics engineer with years of experience, the door was essentially closed. That is starting to change. Fab-leTOME is a browser-based platform that lets you describe a photonic integrated circuit in plain English and receive a structured design plan complete with simulated S-parameters, Bayesian-optimised parameters, and a GDS layout file, all without installing a single piece of software.

The engine behind it is called ALPINE: an AI-driven Photonic Integrated Circuit Design pipeline. It runs entirely in your browser, connecting to your choice of eight LLM backends including GPT-4o, Claude Sonnet 4.5, and Gemini 2.5 Pro. The output isn’t a rough sketch. It is a verified, DRC-checked design ready for the next step toward fabrication.

This is not a toy demo for hobbyists poking at simulations. The mission here is something bigger: making photonics as approachable as electronics became after the integrated circuit arrived. Think of it as the Raspberry Pi moment for light-based computing, arriving right when the world needs it most.

Key Features of Fab-leTOME

Natural Language to Structured Design Spec

You type something like “C-band 2×2 MZI switch with grating coupler I/O, less than 3 dB insertion loss, less than 500 square micron footprint” and the system parses your intent. Every ambiguous assumption gets flagged before the pipeline moves forward. The result is a structured specification covering wavelength band, PDK constraints, component list, and target metrics, all editable at every stage.

SAX Circuit Simulation with Bayesian Optimisation

Once the topology is confirmed, Fab-leTOME runs SAX S-parameter simulation across 128 wavelength points from 1500 to 1600 nm using JAX-JIT interpolated FDTD models. Then Bayesian optimisation, using scikit-optimize with 3 initialization runs and 17 iterations, tunes free parameters against your target transfer function. The benchmark results are published live: B-L2 simulations currently show a 100% pass rate on tasks like MMI splitter insertion loss and MZI free spectral range.

34-Cell PDK Library with DRC Validation

The DemoPDK ships 34 parameterized GDSFactory cells covering gratings, MZIs, ring resonators, directional couplers, Euler bends, heaters, and photodiodes. After layout generation via GDSFactory 9.39, KLayout runs batch DRC to catch geometry violations, connectivity errors, and performance warnings before you download anything.

GDS and OASIS Export, No CAD Tool Required

The export package includes a manifest JSON, SVG mask preview, design README, and labeled GDS files. Binary GDS and OASIS export with full foundry PDK integration is on the near-term roadmap for Pro tier users. Everything runs in the browser. No downloads, no local installs, no licensing headaches.

A Researcher Saves Hours on a Monday Morning

Anika Sharma is a photonics researcher at a university lab in Seattle. At 8:45 on a Monday morning, she needed to prototype a 1×4 WDM demultiplexer for a C-band sensing project. Her usual approach involved manually selecting components from a PDK catalog, sketching a netlist in a Python script, running a simulation locally, and iterating until the FSR matched her target. That process easily consumed a full day.

She opened Fab-leTOME instead. She typed her prompt: “Design 1×4 WDM demultiplexer, cascaded MZI tree, C-band, grating coupler I/O.” The ALPINE pipeline ran entity extraction, matched her components to PDK cells, generated a Graphviz schematic, and kicked off SAX simulation. By 10:15 AM, she had a verified layout with a measured FSR of 17.62 nm and an insertion loss of -3.01 dB, both passing the B-L2 benchmark checks.

She downloaded the export package, reviewed the SVG mask preview, and had something concrete to show her supervisor before lunch. The work that would have taken a full day was done in under two hours, including time for a second iteration where she adjusted the coupler split ratio. That is the concrete difference Fab-leTOME makes for someone who knows what they want but doesn’t want to rebuild the scaffolding every single time.

How the ALPINE Pipeline Runs Your Design

P100: Entity Extraction

Your plain-English description is parsed by the LLM using Pydantic structured outputs. It identifies every photonic component, port configuration, connectivity instruction, and wavelength band. Ambiguous inputs are flagged immediately.

P200: Component Selection

Extracted entities are matched against the 34-cell DemoPDK library using LLM docstring retrieval. The AI selects the best-fit GDSFactory cell and resolves parameters. A pre-schematic DOT graph is generated.

P300: Schematic Generation

The LLM adds port-specific, non-crossing edges to the DOT graph. Graphviz computes node placements in micrometers. Planarity checks flag any crossing edges. The output is a Circuit DSL YAML ready for GDSFactory.

P400: Layout, Simulation, and Optimisation

GDSFactory 9.39 generates the GDS layout. SAX runs the circuit simulation. Bayesian optimisation tunes parameters. KLayout DRC validates design rules. The Studio surfaces all of this as five steps: Plan, Topology, Layout, Verify, and Export.

Fab-leTOME Pricing

  • Free: 2 agent swarm runs per day, up to 5 projects, SVG layout preview, community support
  • Hobby ($11.99/mo): 5 runs per day, unlimited projects, email support, extended run history
  • Enthusiast ($19.99/mo): 10 runs per day, advanced components, DRC verification, priority email support
  • Pro ($39.99/mo): Unlimited runs, full GDS binary export, advanced PDK import, multi-component agentic loop and helps with basic research and iteration on latest literature and component data.

All plans are available monthly or annually, with a 10% discount on annual billing. No credit card is required to start on the free tier.

Who Should Try Fab-leTOME

If you are a photonics researcher, an engineering student, or a hardware-curious developer who has always wanted to explore PIC design without a six-figure EDA license, Fab-leTOME is worth trying today. The free tier is genuinely usable for learning and small circuits. For serious multi-component work, the Pro tier at $39.99 per month gives you full agentic capability and GDS export. Start at fabletome.com and run your first design in under five minutes.

The idea of working on hardware is not that far for you.

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